MC33260DR2G【PDF 13/22 页】IC PFC CONTROLLER DCM 8SOIC

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Sheet目录44

9页 10页 11页 12页 [13页]14页 15页 16页 17页

MC33260

http://onsemi.com

Pin Numbers are Relevant to the PDIP- -8 Version

In particular, a 11 V Zener diode is internally connected

between the terminal and ground on the following pins:

Feedback, V

control

, Oscillator, Current Sense, and

Synchronization.

Figure 31. Synchronization Arrangement

2 ms

sync

Sync

1 V

UVLO

1 V

Output_Ctrl

PWM

Latch

Set

Q1 High <=>

Synchronization Mode

SYNCHRONIZATION BLOCK

The MC33260 features two modes of operation:

?nbsp FreeRunningDiscontinuousMode:Thepowerswitch

is turned on as soon as there is no current left in the

inductor (Zero Current Detection). This mode is

simply obtained by grounding the synchronization

terminal (Pin 5).

?nbsp Synchronization Mode: This mode is set as soon as a

signal crossing the 1.0 V threshold, is applied to the

Pin 5. In this case, operation in free running can only

be recovered after a new circuit startup. In this mode,

the power switch cannot turn on before the two

following conditions are fulfilled.

- - Still, the zero current must have been detected.

- - The precedent turn on must have been followed by (at

least) one synchronization raising edge crossing the

1.0 V threshold.

In other words, the synchronization acts to prolong the

power switch off time.

Consequently, a proper synchronized operation requires

thatthecurrentcycle(on- -time+inductordemagnetization)

is shorter than the synchronization period. Practically, the

inductormustbechosenaccordingly.Otherwise,thesystem

will keep working in free running discontinuous mode.

Figure 36 illustrates this behavior.

It must be noticed that whatever the mode is, a 2.0 ms

minimumoff- -timeisforced.Thisdelaylimitstheswitching

frequency in light load conditions.

OUTPUT SECTION

The output stage contains a totem pole optimized to

minimize the cross conduction current during high speed

operation.Thegatedriveiskeptinasinkingmodewhenever

the Undervoltage Lockout is active. The rise and fall times

have been controlled to typically equal 50 ns while loaded

by 1.0 nF.

REFERENCE SECTION

Aninternalreferencecurrentsource(I

ref

)istrimmedtobe

?% accurate over the temperature range (the typical value

is 200 mA). I

ref

is the reference used for the regulation

regH

= I

ref

UNDERVOLTAGE LOCKOUT SECTION

An Undervoltage Lockout comparator has been

implemented to guarantee that the integrated circuit is

operatingonlyif itssupplyvoltage(V

) ishigh enoughto

enable a proper working. The UVLO comparator monitors

the Pin 8 voltage and when it exceeds 11 V, the device gets

active. To prevent erratic operation as the threshold is

crossed, 2.5 V of hysteresis is provided.

Thecircuitoffstateconsumptionisverylow:intherange

of 100 mA @ V

= 5.0 V. This consumption varies versus

as the circuit presents a resistive load in this mode.

THERMAL SHUTDOWN

An internal thermal circuitry is provided to disable the

circuit gate drive and then to prevent it from oscillating, if

the junction temperature exceeds 150癈 typically.

The output stage is again enabled when the temperature

drops below 120癈 typically (30癈 hysteresis).

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